Analog Circuit Design Engineer

Encontrado en: beBee S MX - hace 3 semanas

Guadalajara, México Intel A tiempo completo
Job Details:
Job Description:

The Analog Circuit Design Engineer drives analog and mixed signal IPs and highspeed interfaces into subsystems or analog components and partners with package and platform teams on analog integration. Supports pathfinding studies in silicon development and relays feedback to silicon and packaging team on analog integration and tradeoffs. Guides the custom design process from specification documentation to silicon tapeout and provides debugging support for analog functionality related debugs in the product. Possesses expertise in design verification flows and packaging effects, to resolve integration challenges involved in mixed signal designs and deliver optimum performance of the overall circuit. Works closely with analog IP, SoC architecture, SoC design, package, layout and platform design functions to meet the analog specification for the product.

As part of the responsibilities, you will:

  • Design, develop, and build analog circuits in advanced process nodes for analog and mixed signal IPs.
  • Design floorplans, perform circuit design, extract chip parameters, and simulate analog behavior models.
  • Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.
  • Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals.
  • Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.
  • Optimizes performance, power, area, and reduces leakage of circuits.
  • Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree in computer engineering, electrical engineering, computer science or any STEM related field with over 6+ years of industry experience OR a master's degree in computer engineering, electrical engineering, computer science or any STEM related field with over 4+ years of industry experience or a PhD in any STEM related field
  • 4+ yrs. experience in two or more of the following:
    • Advanced analog circuit, design and simulation experience.
    • Basic scripting experience.

Preferred Qualifications:

  • Mixed signal circuit design (for example: experience in blocks like ADCs, DACs, PLL, DLL, PI etc.)
Job Type:
Experienced HireShift:
Shift 1 (Mexico)Primary Location:
Mexico, GuadalajaraAdditional Locations:
Business group:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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