Senior High-Speed IO
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QUALCOMM Semiconductores y Sistemas Avanzados de Baja California seeks a Post Silicon Engineer to lead test methodology development and characterization of High Speed SERDES interfaces (PCIe, USB3, UFS, DP, MIPI) and related LP‑DDR/PC‑DDR subsystems.
You will perform silicon bring‑up, debug power and signal integrity issues, coordinate with IC Design, Systems Engineering and Customer Engineering to resolve complex RMA problems, and analyze parametric data to optimize designs across conditions.