Senior DRAM Layout Engineer – Tape-Out
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Micron Technology, Inc. in Mexico’s Jalisco region is seeking a DRAM DEG Layout Designer to translate schematics into physical layouts for fabrication tape-outs, coordinating with design and CAD teams to meet deadlines and ensure design integrity.
You will develop and optimize IP layouts for DRAM products, perform DRC/LVS/EM checks, and collaborate with global engineering teams to resolve layout challenges and deliver high-quality tape-outs.