Lead DRAM Design Verification Engineer
hace 1 semana
Job Description:
The Lead DRAM Design Verification Engineer will be responsible for developing innovative memory and storage solutions that accelerate information transformation into intelligence, inspiring faster learning, communication, and advancement.
This role will work closely with highly innovative design and verification teams using state-of-the-art memory technologies to develop advanced DRAM and emerging memory products.
- Design/verify high-density memory chips with complicated functionality, ultra-high speed, advanced low power, and power management technology
- Evaluate designs at chip or block level on functionality and provide solutions
- Work closely with global design teams to contribute to design success by applying verification tools and techniques
- Develop digital/analog mixed-signal verification methodology for advanced DRAM products and design implementation of mixed-signal design verification environment
About the Role:
We are seeking a highly skilled Lead DRAM Design Verification Engineer to join our team. The ideal candidate will have a strong understanding of CMOS circuit design, experience with analog simulation tools such as HSPICE and PRIMESIM, and good programming fundamentals with Python programming knowledge.
Responsibilities:
- Understand design datasheets and study circuit design in detail
- Develop verification patterns and regressions to increase function coverage for all DRAM architectures and features
- Support design engineers, debug failures, manage bug tracking, and close coverage
- Collaborate with international colleagues to develop new verification tools and flows
- Develop and maintain test benches and test vectors using digital and analog simulation tools
Requirements:
- BS or MS in Electrical Engineering, Computer Engineering, or equivalent with emphasis on VLSI design and/or Verification
- Strong understanding of CMOS circuit design
- Experience with analog simulation tools such as HSPICE and PRIMESIM
- Basis knowledge of digital simulators like Verilog and UVM Methodology
- Good programming fundamentals with Python programming knowledge
- Excellent debugging and problem-solving skills
- Strong communication and teamwork skills
Salary: $120,000 per year
Benefits: We offer a competitive salary, excellent benefits package, and opportunities for professional growth and development.
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