Memory and Storage Solutions Architect

hace 4 semanas


Tlaquepaque, Jalisco, México Micron A tiempo completo

At Micron Technology, we are pushing the boundaries of memory and storage innovation. As a Senior DRAM Layout Engineer, you will play a crucial role in designing and developing IP layouts for DRAM chips that drive optimal performance and quality.

About the Role

  • Design and Development: Utilize your expertise in layout area and routing optimization, design rules, yield, and reliability issues to develop high-quality IP layouts.
  • Leadership and Collaboration: Lead the development of block-level layouts, guide junior team members, and collaborate with global engineering teams to ensure project success.

Requirements

  • 5+ years of experience in layout designs in advanced CMOS processes
  • Expertise in Cadence tools, including Virtuoso schematic editor, Virtuoso layout, and verification tools
  • Leadership qualities, excellent problem-solving skills, and ability to work in a team environment

What We Offer

  • A collaborative environment, groundbreaking technology, and opportunities for growth and development


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