Senior Design Engineer for Advanced Memory Layout

hace 2 semanas

Tlaquepaque, Jalisco, México Micron A tiempo completo

At Micron Technology, we're revolutionizing the way information is used to enrich lives. As a world leader in memory and storage solutions, our mission is to accelerate this transformation.

Our team of visionaries and scientists develops groundbreaking technologies that are transforming how the world uses information. We strive to create an inclusive and diverse work environment that enables your creative career path through collaboration and innovative technology.

Job Overview

We're looking for a Senior Design Engineer to join our DRAM and Emerging Memory Group (DEG). In this role, you will collaborate with a talented core team and peer teams across our global footprint in a multiple projects-based environment.

Key Responsibilities
  • Design and development of IP layouts used in DRAM chips.
  • Perform layout verification like LVS/DRC/EM, quality check, and documentation.
  • On-time delivery of block-level layouts with acceptable quality.
  • Leadership skills in planning, area/time estimation, scheduling, delegation, and execution to meet project schedule/milestones.
  • Guide junior team-members in their execution of sub-block-level layouts and review their work.
  • Contribute to effective project-management.
Requirements
  • 5+ years of experience in layout designs in advanced CMOS process.
  • Ability to perform IP layout development and physical verification activities for complex designs as per provided specifications.
  • Expertise in layout area and routing optimization, design rules, yield, and reliability issues.
  • Good understanding of layout fundamentals such as electro-migration, latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
  • Adequate knowledge of schematics, interface with circuit designer and CAD team.
  • Understanding layout effects on the circuit such as speed, capacitance, power, and area, etc.
  • Excellent problem-solving skills in solving area, power, performance, and physical verification of custom layout.
  • Experience with Cadence tools including Virtuoso schematic editor, Virtuoso layout, L, XL & Verification tools like Mentor Calibre, Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
  • Leadership qualities and ability to do multi-tasking as required.
  • Ability to work in a team environment and provide technical support to fellow team members.
  • Self-motivated, hardworking, goal-oriented, and excellent verbal and written communication skills.
  • Knowledge of coding and layout automation would be a plus.
What We Offer
  • $120,000 - $180,000 per year, depending on experience.
  • A comprehensive benefits package including medical, dental, and vision insurance.
  • A 401(k) plan with company match.
  • Generous paid time off and holidays.
  • Professional development opportunities.
About Us

Micron Technology is a world leader in innovating memory and storage solutions. Our team of visionaries and scientists develops groundbreaking technologies that are transforming how the world uses information to enrich life.

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