Lead Layout Designer for CMOS Process Expert

hace 4 semanas

Tlaquepaque, Jalisco, México Micron A tiempo completo

Transforming Information into Intelligence

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are seeking an experienced and skilled Layout Designer to join our DEG (DRAM Engineering Group) Design Methodology group. As a Layout Designer, you will play a vital role in creating innovative layouts to support our Commodity, Mobile, and Emerging R&D Design, Process, and Product Engineering customers.

About the Role:

You will have the opportunity to showcase your expertise in CMOS device physics and electrical characteristics through your exceptional designs, and opportunity to work on mask generation and reticle design.

Your Responsibilities:

  • Collaborate with Design customers to plan and document layout, ensuring it meets Design and Process customer specifications.
  • Verify layout quality using DRC, LVS, and other verification tools, both vendor-supplied and in-house.
  • Develop and document layout tools and methodologies to enhance quality, either through CAD or coding efforts.
  • Identify issues and provide innovative solutions through effective communication.
  • Lead sections of the layout design, coordinating with local and global teams to ensure quality for Design and Process customers.

Requirements & Qualifications:

  • A minimum of 5 years of experience in custom layout with advanced CMOS process.
  • Expertise in layout area and routing optimization, design rules, yield and reliability issues.
  • Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
  • Adequate knowledge of CMOS circuits/schematics, interface with circuit designer and CAD team.
  • Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
  • Excellent problem-solving skills in solving area, power, performance and physical verification of custom layout.
  • Experience with Cadence tools including Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Calibre.
  • Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
  • Leadership qualities and ability to multitask as required.
  • Able to work in a team environment and guide and provide technical support to fellow team members.
  • Self-motivated, hardworking, goal-oriented and excellent verbal and written communication skills.
  • Knowledge of Skill coding and layout automation is a plus.

Salary Estimate:

The estimated salary for this role is $120,000 - $180,000 per year, depending on location and experience.

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