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Senior Verification Engineer

hace 2 meses

Tlaquepaque, Jalisco, México Micron Memory Malaysia Sdn Bhd A tiempo completo
About the Role

We are seeking a highly skilled Senior Verification Engineer to join our Design Methodology Development team at Micron Memory Malaysia Sdn Bhd. As a key member of our team, you will be responsible for developing and implementing cutting-edge verification methodologies to drive innovation in our memory and storage solutions.

Key Responsibilities
  • Design and develop advanced verification languages and techniques to build a next-generation verification platform.
  • Collaborate with cross-functional teams to create full chip behavior models that meet the needs of our global customers.
  • Develop and execute verification plans that incorporate directed and random patterns to cover all features of our memory designs.
  • Perform verification processes using industry-standard simulators and contribute to the development of our verification methodologies.
  • Drive innovation in our memory generations by identifying and implementing new verification techniques and tools.
Requirements
  • Fluency in verification languages (System Verilog) and methodologies (UVM).
  • Solid understanding of object-oriented design principles.
  • Ability to abstract complex technical details into easy-to-understand interfaces.
  • Good debugging and problem-solving skills.
  • Experience in using scripting languages to automate tasks.
  • Experience defining coverage strategies and writing coverage models.
  • Excellent communication and teamwork skills.
  • Previous experience in ASIC or Memory verification.
  • Good understanding of CMOS circuit design principles.
Education

Bachelor's or Postgraduate Degree in Electronics Engineering or a related engineering field.