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Layout Design Engineer

hace 3 semanas

Guadalajara, Jalisco, México Experis México A tiempo completo


Micron Technology, en colaboración con Experis, está buscando un
Layout Design Engineer

Aplica aquí

En Experis México, parte de ManpowerGroup, somos líderes en atracción de talento especializado en tecnología y gestión estratégica. Hoy colaboramos con una empresa nacional en transformación, con fuerte crecimiento operativo, y buscamos un(a) Subdirector(a) de Administración de ERP que quiera liderar un proyecto clave de optimización y control.

Micron Technology
, líder global en memoria y semiconductores, para incorporar un
Layout Design Engineer
a su equipo de
HBM (High Bandwidth Memory)
en
Guadalajara, México
.


Modalidad híbrida

Este rol forma parte de proyectos estratégicos para aplicaciones de
alta demanda computacional, IA y HPC
, colaborando con equipos globales en múltiples zonas horarias.

Responsabilidades

  • Diseño y desarrollo de bloques críticos:
    analog, mixed-signal y custom digital
    .
  • Integración a nivel full-chip, soporte en nodos avanzados
    CMOS (Planar / FinFET)
    .
  • Ejecución y verificación de layout:
    DRC, LVS, Antenna, ERC
    , calidad y documentación.
  • Entrega puntual de layouts con calidad acorde a estándares de Micron.
  • Estimación de área, tiempos, planificación y seguimiento de
    milestones
    .
  • Revisión y mentoría para miembros junior del equipo.
  • Colaboración constante con equipos globales de ingeniería.

Requisitos mínimos

  • Experiencia en
    analog/custom layout
    en tecnologías CMOS avanzadas.
  • Dominio de
    Cadence Virtuoso (VLE/VXL)
    y
    Mentor Graphics Calibre DRC/LVS
    .
  • Experiencia creando layout para bloques como:
  • Temperature sensors
  • PLL
  • ADC/DAC
  • LDO
  • Bandgap / Ref Generators
  • Charge Pump
  • Current Mirrors
  • Comparators
  • Differential Amplifiers
  • Conocimiento sólido de fundamentos de analog layout:
    matching, electromigración, latch-up, parasíticos, IR-drop, crosstalk, coupling
    , etc.
  • Comprensión profunda del impacto del layout en
    speed, area, power y capacitances
    .
  • Inglés avanzado
    (colaboración diaria con equipos globales).

Cualificaciones deseables

  • Habilidades avanzadas para troubleshooting físico y verificación custom.
  • Conocimientos en:
  • FinFET / CMOS / BiCMOS / SOI
  • Parasitic extraction
  • DFM / LPE
  • Routing congestion y electromigración
  • SERDES / PLL / AFE / BIAS / REFGEN layouts

Ubicación

Guadalajara, Jalisco – esquema híbrido.

__________________

En ManpowerGroup promovemos entornos laborales inclusivos, donde el talento y las habilidades son valorados sin distinción de características individuales como sexo, edad, orientación sexual, identidad o expresión de género, nacionalidad, estatus migratorio, apariencia física, discapacidad, idioma, situación social, económica, de salud o legal, embarazo, estado civil, religión, opiniones, expresión corporal, diversidad corporal, afiliación política, tatuajes visibles o no visibles, modificaciones corporales, o cualquier otra condición que pudiera ser considerada.