Atom Power Management Validation Engineer

hace 13 horas

Guadalajara, México Intel A tiempo completo

**Job ID**:JR **Job Category**:Engineering**Primary Location**:Guadalajara, JAL MX**Other Locations:***Job Type**:College GradAtom Power Management Validation Engineer- Skills at using sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others.- Skills to develop an implementation, plan, monitor, key indicators, and adjust resources and scope to deliver value on schedule.- Strong verbal and written communication and collaboration skills.**As a CPU Pre Silicon Development Engineer, you will**:- Develop pre Silicon functional validation tests to verify system will meet design requirements.- Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.- Analyze and use results to modify testing.- You will have the opportunity to work with the future of Intel, the next generation of microprocessors. Even before they reach silicon phase.**Qualifications****Education**:Bachelor's in Computer Engineering, Electrical Engineering, or related field of study ("Cedula Profesional" may be required) with 1+ years of experience (experience can be offset by Master's or PhD degree):Relevant experience can be obtained through school work, classes and project work, internships, and/or work experience.**Minimum Qualifications**:- Intermediate+ English Level.- 3+ months of experience in validation on the CPU.- 6+ months of experience in system Verilog or OVM/UVM.- 3+ months of experience in CPU microarchitecture in areas such as out of order execution.**Preferred Qualifications**:- Processor pipelines.- Memory load and store.- Cache Coherency Paging.- CPU assembly.- Validation on the CPU including experience in the area of power management validation.- Verilog and/or System Verilog OVM, hardware modeling, and Assertions.- Power management UPF.- Low power design.- Test plans test writing and coverage.- Closely related areas such as SOC, power management, subsystem design, or validation.- Test bench architecture and hands on development of components like BFMs, checkers, transactors, monitors, and others using verification methodologies like System Verilog, OVM/UVM, or equivalent.- Independent debug of System Verilog RTL failures to root cause functional bugs.- Directed or Constrained Random test writing skills.**Inside this Business Group**In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

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