Design Verification Engineer, Staff
hace 6 días
We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are You are a seasoned Design Verification Engineer who thrives in a dynamic environment. You have a strong background in SoC design verification and are excited about collaborating with experts in a fast-paced digital design team. Your extensive experience in UVM methodology-based design verification, coupled with your proficiency in System Verilog, HDL, and scripting languages like Perl and Python, makes you a valuable asset. You are adept at understanding specifications, developing test plans, and verifying integrated IP subsystems for advanced systems. Your problem-solving skills are top-notch, and you exercise autonomous judgment in selecting methods and techniques to obtain solutions. You are a team player who networks effectively with senior internal and external personnel and guides junior peers with aspects of their job. Your excellent communication skills enable you to convey complex technical concepts clearly and concisely. What You'll Be Doing Developing and executing verification test plans and test cases for SoC devices. Creating and maintaining verification environments using UVM methodology. Collaborating with design and architecture teams to understand specifications and define verification scope. Debugging and resolving issues creatively and efficiently during the verification process. Participating in code reviews and providing feedback to improve overall design quality. Mentoring and guiding junior verification engineers on best practices and methodologies. Impact You Will Have Ensuring the correctness and reliability of SoC designs through rigorous verification processes. Contributing to the development of high-performance silicon chips that power innovative technologies. Driving improvements in verification methodologies and processes within the team. Enhancing the overall quality and performance of Synopsys' products. Enabling the creation of cutting-edge solutions that shape the future of technology. Building a collaborative and knowledgeable verification team through mentorship and guidance. Required Qualifications Bachelor or Master Degree in Electrical, Computer Engineering, Computer Science, or related area. 5+ years of experience verifying SoC devices with a strong understanding of the SoC development design flow. Proficiency in UVM methodology-based design verification. Hands‑on experience in System Verilog, HDL, and scripting languages such as Perl and Python. Knowledge of standard protocols such as PCIe, DDR4, GDDR, HBM, AMBA. Experience with design validation using Emulation, HAPs, or FPGA prototyping systems from RTL design is a plus. Who You Are An expert in Object‑Oriented Programming and modern verification processes. A key contributor who can create and execute test plans with a deep understanding of RTL design. Experienced with tools such as Synopsys VCS and Verdi. Excellent written and verbal communicator. A team player who collaborates effectively with cross‑functional teams. The Team You will join our dynamic Digital Team, a group of talented engineers dedicated to pushing the boundaries of technology. Our team focuses on the verification of integrated IP subsystems for advanced systems, working collaboratively to solve complex design challenges. We value innovation, continuous learning, and the sharing of knowledge to achieve our collective goals. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
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Staff SoC Verification Engineer
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Región Centro, México Synopsys A tiempo completoA leading technology company in Mexico is seeking a Design Verification Engineer to develop and execute verification test plans for SoC devices. The ideal candidate should possess over 5 years of experience in SoC design verification, proficiency in UVM methodology, System Verilog, HDL, and scripting languages such as Perl and Python. This role involves...
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