DRAM Design Verification Lead/Manager

hace 2 semanas

Guadalajara, Jalisco, México Manpower Mexico A tiempo completo


Experis Mexico is searching for a passionate and experienced DRAM Design Verification Lead or Manager to join our innovative team As a leader in memory and storage solutions, we're dedicated to pushing the boundaries of what's possible. In this role, you'll play a pivotal role in ensuring the quality and functionality of our next-generation DRAM products.

Responsibilities:

  • Leverage your in-depth knowledge of DRAM specifications, circuit implementation, performance targets, and verification methodologies to guide our verification strategy and architecture verification systems.
  • Collaborate effectively across functional teams to ensure alignment on verification plans and coverage goals.
  • Drive the development of patterns and regressions to execute comprehensive functional and timing verification plans.
  • Own and lead the product verification process, including plan creation, execution, review, and silicon debugging support. Motivate and guide your team to achieve project deadlines and deliverables.
  • Provide technical support to design and verification engineers. This includes simulating, analyzing, and debugging circuit issues.
  • Foster a collaborative and supportive work environment by mentoring team members, offering technical guidance, and encouraging professional development.
  • Optimize resource allocation and ensure timely project execution.
  • Leverage your expertise in Micron's verification tools and flows. Collaborate with international colleagues to develop innovative verification tools and methodologies that enhance verification quality and efficiency.
  • Build a strong and engaged team, providing career development support to your team members.

Qualifications:

  • 10+ years of experience in complex IC verification and/or IC design (memory experience a plus).
  • Proven track record in functional verification and timing analysis, particularly with mixed-signal designs.
  • Solid understanding of CMOS circuit design, with preference for gate-level expertise.
  • Excellent communication skills with the ability to explain complex technical concepts to a variety of audiences.
  • Experience with SystemVerilog Assertion (SVA).
  • Familiarity with industry-standard simulation tools (HSPICE, Verilog-HDL, FINESIM, PrimeSim).
  • Strong leadership and project management skills.
  • Excellent written and spoken English is a requirement.
  • Minimum education: BS in Electrical Engineering + 10 years of experience or MS in Electrical Engineering + 8 years of experience.

Benefits:

  • IMSS, INFONAVIT, AFORE
  • Food Coupons $2,600 monthly
  • Savings Box
  • PTO: 6 days upon hire
  • 75% Vacation bonus
  • Paid Holiday: Additional 4 paid holidays each calendar year

Join Experis and be a part of shaping the future of memory technology

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