Sr. Design for Test Engineer
hace 3 semanas
37313BR
- MEXICO-Guadalajara
**Job Description and Requirements**
- At Synopsys, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. In addition to the traditional EDA tools and IP we also provide design services to enable our customers with end-to-end SoC design solution in advanced technology nodes. If you share our passion for innovation, we want to meet you.- In this role you will have the opportunity to collaborate in a high performance DFT team, on cutting edge projects and using the most advanced technologies nodes.**Responsibilities**:
- Responsible for the development and implementation of System Design Solutions using Synopsys EDA tools and IP to solve customer problems as part of a service project team. Demonstrates expertise in at least one service line area (which include RTL Design & Verification, Physical Design, Design for Test and SoC Design from spec to post-silicon bring-up). Contributes to both turnkey projects and as a trusted advisor to customer design and CAD teams. Develops innovative solutions to problems with little guidance and implements them unsupervised. Sets task-level goals and consistently meets schedules. Works with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tool and IP solutions.
- **Requirements**:
- Typically requires a minimum of 5 years of related experience. Possesses a solid understanding of specialization area plus working understanding of one other related area. Resolves issues in creative ways. Exercises autonomous judgment in selecting methods and techniques to obtain solutions. Executes projects from start to completion. Contributes to moderately complex aspects of a project. Establishes and develops recommendations to solutions. Works on team-oriented or task-oriented projects. May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise.
- Qualifications:
- +3yrs of direct industry Design For Test experience
- Able to assess and mitigate risks
- Capable to adopt and understand the DFT flow and process
- Has proven track record in DFT architecture, Jtag, Mbist, boundary scan, SCAN, test pattern generation, timing analysis and Gate Level simulation
- Experience on post silicon debug and bring-up is a plus
- Experienced with Synthesis and ATPG tools
- Experience on evaluate and improve Test Coverage
- Good verbal and written communication skills
- Autonomous and a self-starter
- Capable to quickly understand project requirements, DFT tasks, dependencies and scheduling
Business Area Description
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
About Synopsys
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
**Stay Connected**:Join our Talent Community
EEO
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
LI-TS1
**Job Category**
- Engineering
**Country**
- Mexico
**Job Subcategory**
- SOC Engineering
**Hire Type**
- Employee
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