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Design Verification Specialist

hace 2 meses


Tlaquepaque, Jalisco, México Micron A tiempo completo
About the Role

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are seeking a highly skilled Verification Engineer to join our innovative and motivated verification team. As a Verification Engineer at Micron Technology, you will work on developing and verifying the most advanced DRAM products using groundbreaking memory technologies.

Key Responsibilities
  • Develop and verify high-density memory chips with complicated functionality, ultra-high speed, sophisticated low power, and power management technology.
  • Work closely with Micron's global design teams to contribute to the success of the design team by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.
  • Participate in developing digital/analog mix-signal verification methodology for sophisticated DRAM products, as well as design and implementation of mix-signal design verification environment.
What You'll Do Daily
  • Fully understand the design datasheet and study the circuit design in detail.
  • Develop patterns and regressions to increase the function coverage for all DRAM architectures and features.
  • Provide support to design engineers, debug failures, handle bug tracking, and close coverage.
  • Co-work with international colleagues on developing new verification tools and flows to tackle the verification difficulties.
  • Develop and maintain test benches and test vectors using digital and analog simulation tools.
  • Create new methods and flows to guide DRAM chip design from verification view.
  • Create verification plan from functionality specification and in coordination with architects.
  • Work with cross-functional group to define and develop DFT patterns.
What Sets You Apart
  • Fluency in verification languages (System Verilog or equivalent) and methodologies (UVM or equivalent).
  • Experience defining coverage strategy and writing coverage model.
  • Basic understanding of CMOS circuit design.
  • Familiar with analog/digital simulation tools, i.e., HSPICE, VerilogHDL, FINESIM.
  • Experience in SV, VPI coding.
  • Experience in UVM Test Bench.
  • Previous work experience in DRAM memory related fields.
  • Experience with SystemVerilog Assertion (SVA) is a plus.
Requirements
  • BS or MS or equivalent experience in Electrical Engineer or Computer Engineering.
  • Good debugging and problem-solving skills.
  • Effective communication skills with the ability to convey complex technical concepts to other verification peers.
  • Must possess excellent communication skills and ability to work well in a team.