Senior Layout Architect

hace 2 días


Tlaquepaque, Jalisco, México Micron A tiempo completo
Job Description:

We are seeking a highly skilled DRAM Engineering Group Design Technology (DEGDT) Layout Designer to join our team at Micron Technology, Inc.

The ideal candidate will have 10+ years of experience in Cadence VLE/VXL and Calibre DRC/LVS and possess strong technical knowledge in circuit design, verification protocols, and tape out processes.

The successful candidate will be responsible for translating schematics into layout used for the creation of fabrication reticles, meeting all engineering and process-related criteria needed for assigned DRAM products.

This role involves working closely with design engineers to floor plan and design layout, applying custom and automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits.

The selected individual will also lead projects to support technical innovation, organize and prioritize logistics and resource allocations, and develop methodologies to resolve complex issues.

Salary: $120,000 - $150,000 per year, depending on location and experience.


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