Senior Verification Engineer

hace 1 mes


Zapopan, Jalisco, México Synopsys, Inc. A tiempo completo
Job Overview

We are seeking a skilled Senior Verification Engineer to join our team at Synopsys, Inc. As a key member of our digital team, you will be responsible for designing and implementing verification environments for advanced systems. Your expertise in verification methodologies and tools will enable us to deliver high-quality products to our customers.

Key Responsibilities
  • Develop and execute verification plans, including test plans and test cases, to ensure the correctness of our designs.
  • Collaborate with cross-functional teams to identify and resolve issues in the verification environment.
  • Stay up-to-date with industry-leading verification methods and tools, and apply this knowledge to improve our verification processes.

Requirements
  • Bachelor's or Master's degree in Electrical, Computer Engineering, Computer Science, or related field.
  • 5+ years of experience in verification engineering, with a focus on SoC devices and understanding of the overall SoC development design flow process.
  • Demonstrated expertise in UVM methodology-based design verification.
  • Hands-on experience with System Verilog, HDL, and scripting languages such as Perl and Python.

Preferred Qualifications
  • Knowledge of standard protocols such as PCIe, DDR4, GDDR, HBM, and AMBA.
  • Experience with design validation using Emulation, HAPs, or FPGA prototyping systems from RTL design.


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