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Asic/layout Design Engr, Sr Ii

hace 2 semanas

Guadalajara, México Synopsys A tiempo completo

37200BR

MEXICO-Guadalajara, Mexico-Mexico

**Job Description and Requirements**

**Senior Analog/Mixed-Signal Layout Engineer**

As a Senior II A&MS Layout Engineer you will collaborate in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be responsible for taking on top-level block ownership with technical expertise and skills. There will also be opportunities to act as analog layout technical lead where you will be coordinating with other team members in designing and reviewing layout designs.
As a member of our Solutions IP Design Group you will be developing IP in various technology nodes and foundries for different customers in a fast paced and exciting design environment.
**Requirements**:

- In depth familiarity with layout of analog and mixed signal CMOS circuits
- Experience in development of high-speed analog layout in advanced finFET technology nodes
- Experience in the following layout design techniques:

- Optimization for signal integrity (ie. clock/data routes, differential routing, shielding)
- Implementation of ESD design constraints, latch-up risk mitigation
- Familiarity with custom digital layout (logic cell layout and associated logic path routing)
- Layout design for reliability (ie. EM, IR, etc )
- Design to optimize for parasitic layout effects (ie. matching, reliability, proximity effects, etc )
- Familiarity in design for porting techniques
- Full custom analog layout design tool: Custom Compiler (or equivalent)
- Verification tools: ICV, Star-RCXT, PERC (or equivalent)
- Intimate knowledge of the full design cycle from RTL to GDSII, including chip level.
- Experience with advanced FinFET nodes, TSMC 16 nanometer or below.
- A solid engineering understanding of the underlying concepts of IC design, implementation flows and methodologies for deep submicron design.
- Experience in working with Jira/Atlassian (or other such) tools
Exposure to scripting (ie. TCL, PERL, etc )
- Strong technical English communication skills

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
**Stay Connected**:Join our Talent Community
- Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability._

**Job Category**

Engineering

**Country**

Mexico

**Job Subcategory**

Layout Design

**Hire Type**

Employee